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…of Computers & Electrical Engineering (COMPELECENG), Vol. 39, No. 4, pp. 1333-1345, May 2013. Asaduzzaman, A., Sibai, F.N., and Rani, M., “Improving Cache Locking Performance of Modern Embedded Systems via the Addition of a Miss Table at the L2 Cache Level,” in Elsevier Journal of Systems Architecture (JSA), Vol. 56, No. 4-6, pp. 151-162, April 2010. ...…
https://www.wichita.edu/academics/engineering/ECE/research/CAPPLab/pcf/2023-nov-27.php